1. Field of the Invention
The present invention relates to a wafer support pin used in annealing a wafer and a wafer annealing method using the same, and more particularly to a structure of a wafer support pin capable of minimizing gravitational stress applied to a wafer and also capable of minimizing heat loss to minimize slip dislocation, and a wafer annealing method using the same.
2. Description of the Related Art
An annealing process is generally carried during a semiconductor device manufacturing procedure. In case of a silicon wafer, oxygen existing in the wafer forms oxygen precipitates during the annealing process conducted in the semiconductor device manufacturing procedure. Also, during the semiconductor device manufacturing procedure, oxygen precipitates exceeding a certain level act as internal gettering sites against metal impurities that may be a contamination source, so the oxygen precipitates are inevitable essential elements. However, to a certain depth in a surface region of a wafer used for making a semiconductor device, there should be ensured a denuded zone where oxygen precipitates should not be generated. Thus, as a method for forming the denuded region without defect and a BMD (Bulk Micro-Defect) containing oxygen precipitates over a certain level in a bulk region, wafer manufacturers use long time annealing or high temperature rapid thermal annealing (RTA). In particular, in spite of many unsolved problems, the high temperature rapid thermal annealing is more used recently due to a short process time and resultant high productivity.
The high temperature rapid thermal annealing anneals a wafer for several to several ten seconds at a high temperature of 1,150 to 1,250° C., which inevitably causes slip dislocation in the wafer. If slip dislocation generated during the high temperature annealing exists on a surface, current leakage occurs in the semiconductor device manufacturing procedure, which becomes a cause of deteriorated yield. Thus, to control this problem, the rapid thermal annealing process employs a method of balancing the center of gravity of a wafer on a 0.7 R inner 3-point support points.
In the wafer on a 0.7 R inner 3-point supporting method, three sharp-ended pins made of quartz as shown in FIG. 1 are used to balance the center of gravity of a wafer on a 0.7 R inner 3-point support. In this method, the wafer and pins are contacted in a minimum area, so it is possible to minimize thermal stress caused by heat loss and deviation of thermal expansion coefficient according to the material difference of silicon and quartz, and also it is possible to minimize slip dislocation. Thus, the wafer on a 0.7 R inner 3-point supporting method using the wafer support pins is currently broadly used for rapid thermal annealing of a wafer not greater than 8 inches.
However, as wafers become larger, weight of wafer also tends to become greater. Thus, the gravitational stress, which was not issued in 8-inch wafer, becomes a problem in 12-inch wafer, as explained later, so the conventional wafer supporting method is now insufficient for slip control.